1. Field of the Invention
The present invention relates generally to integrated circuit fabrication methods and, more particularly, to providing an integrated circuit capable of operating within predetermined parameters despite a profile shift.
2. Description of Related Art
Fabrication processes for semiconductor devices and integrated circuitry have traditionally included depositing or epitaxially growing layers on a substrate. Layers are patterned through photolithographic processes before additional layers are deposited or grown. A photolithographic process can include depositing a photoresist on top of a layer, positioning a reticle mask (containing a pattern of opaque lines and regions on an otherwise transparent material) over the photoresist, and shining coherent or noncoherent light through the reticle mask onto the photoresist. The light cures the photoresist only where the photoresist is not shadowed by the reticle mask pattern. Any cured photoresist (e.g., the photoresist exposed by the reticle mask pattern) is then washed away, exposing regions of the uppermost layer to subsequent processes such as oxidation, metal deposition, and/or impurity doping. Finally, any uncured photoresist is then stripped away, and another photolithography process may begin with another material.
An industry trend toward smaller devices has exacerbated a need to align the subsequent reticle masks more precisely with the previous photolithographic step. If, for example, a semiconductor-layer step creates a transistor and then a subsequent metal-layer step is not aligned precisely, a vital connection between the transistor and a conductive path may not be formed.
To facilitate alignment, many fabrication steps include creation of a vernier pattern, overlay marks, or other alignment marks on both a reticle mask and the layer to which the reticle mask is to be aligned. Such alignment marks are not necessary for operation of the integrated circuit, but can allow improved alignment of the reticle masks with the substrate.
In some processes, to flow deposited materials, such as metal melts, onto the substrate, heating (e.g., annealing) is implemented. Heating upper layers can unfortunately cause a flexing of the substrate resulting in a profile shift, since different layers on the substrate are made of different materials with different rates of thermal expansion. The distances between verniers and/or alignment marks (particularly those near the periphery of the substrate) might change relative to other features in the layer. Also, the heating of upper layers might reflow or soften lower layers, allowing one edge of an overlay mark or alignment mark to dip more than another edge, perhaps changing an angle of the upper surface of the overlay mark or alignment mark with respect to other features on the layer.